1. Field of the Invention
This invention relates to an energy recovery apparatus, and more particularly to an apparatus and a method for energy recovery without a source capacitor.
2. Description of the Related Art
Recently, there has been developed various flat panel display devices reduced in weight and bulk that are capable of eliminating disadvantages associated with cathode ray tubes CRT. Such flat panel display devices include a liquid crystal display LCD, a field emission display FED, a plasma display panel PDP and an electro-luminescence EL panel, etc.
The PDP among these flat panel display devices is a display device using gas discharge and has an advantage that it is easy to be made on a large scale. A typical PDP is a three-electrode AC surface discharge PDP that has three electrodes, as shown in FIG. 1, and is driven by AC voltage.
Referring to FIG. 1, a discharge cell of the three-electrode AC surface-discharge PDP includes a first electrode 12Y and a second electrode 12Z formed on an upper substrate 10, and an address electrode 20X formed on a lower substrate 18.
On the upper substrate 10 provided with the first electrode 12Y and the second electrode 12Z in parallel, an upper dielectric layer 14 and a passivation film 16 are disposed. Wall charges generated upon plasma discharge are accumulated in the upper dielectric layer 14. The passivation film 16 prevents a damage of the upper dielectric layer 14 caused by a sputtering during the plasma discharge and improves the emission efficiency of secondary electrons. This passivation film 16 is usually made from magnesium oxide (MgO).
A lower dielectric layer 22 and barrier ribs 24 are formed on the lower substrate 18 provided with the address electrode 20X. The surfaces of the lower dielectric layer 22 and the barrier ribs 24 are coated with a phosphorus 26. The address electrode 20X is formed in a direction crossing the first electrode 12Y and the second electrode 12Z. The barrier ribs 24 are formed in parallel to the address electrode 20X to prevent an ultraviolet ray and a visible light generated by a discharge from being leaked to the adjacent discharge cells. The phosphorus 26 is excited by the ultraviolet ray generated during the plasma discharge to generate any one of red, green and blue visible light rays. There is an inactive gas for a gas discharge injected into a discharge space defined between the upper and lower substrate 10 and 18 and the barrier ribs 24.
Such a three-electrodes AC surface discharge PDP is divided into a plurality of sub-fields to be driven and there are lights emitted as frequent as the number of times proportional to a weight of video data in each sub-field period so as there to be a gray level display carried out. The sub-field SF1 to SF8 is divided again into a reset period, an address period, a sustaining period and an erasure period and is driven.
Herein, there are uniform wall charges formed in a discharge cell during the reset period. There is an address discharge generated in accordance with a logical value of video data during the address period. There is a discharge sustained in the discharge cell, in which the address discharge has been generated, during the sustaining period. There is a sustaining discharge, which was generated during the sustaining period, eliminated during the erasure period.
There is a high voltage of hundreds volt or more needed in the address discharge and the sustaining discharge of the AC surface discharge PDP, which is driven in this way. Accordingly, there is an energy recovery apparatus used for minimizing a driving power necessary for the address discharge and the sustaining discharge. The energy recovery apparatus recovers the voltage between the first electrode 12Y and the second electrode 12Z and makes use of the recovered voltage as the driving voltage for the next discharge.
FIG. 2 illustrates a circuit diagram of an energy recovery apparatus formed in a first electrode in order to recover a sustaining discharge voltage.
Referring to FIG. 2, an energy recovery apparatus according to the related art includes an inductor L connected between a panel capacitor Cp and a source capacitor Cs; a first switch S1 and a third switch S3 connected between the source capacitor Cs and the inductor L in parallel; a second switch S2 and a fourth switch S4 connected between the panel capacitor Cp and the inductor L in parallel; and a power source capacitor Cv connected between a reference voltage source Vs and a ground GND.
The panel capacitor Cp is equivalent to a capacitance formed between the first electrode Y and the second electrode Z. The second switch is connected to the reference voltage source Vs, and the fourth switch is connected to the ground GND. The source capacitor Cs recovers the voltage charged in the panel capacitor Cp upon the sustaining discharge to be charged with and applies the charged voltage to the panel capacitor Cp.
The power source capacitor Cv prevents the reference voltage source Vs from being dropped when the reference voltage source Vs is applied. In other words, the capacitor Cv prevents a swing of the reference voltage source Vs when the reference voltage source Vs is applied, thereby always applying a uniform voltage of the reference voltage source Vs.
The source capacitor Cs has a capacitance capable of charging a voltage of Vs/2 corresponding to a half value of the reference voltage source Vs. The inductor L forms a resonance circuit together with the panel capacitor Cp. The first to fourth switches S1 to S4 control the flow of current. The energy recovery apparatus formed in the second electrode Z and the energy recovery apparatus formed in the first electrode Y are symmetrically formed with respect to the panel capacitor Cp.
On the other hand, a fifth diode D5 and a sixth diode D6 disposed between the first switch S1 and the inductor L and between the third switch S3 and the inductor L respectively prevent electric current from flowing in a reverse direction. Also, the first to fourth switches S1 to S4 have internal diodes D1 to D4 additionally installed to be connected to each of switches S1 to S4 in parallel.
FIG. 3 illustrates a diagram representing on/off timing of the switches and an output waveform of a panel capacitor, shown in FIG. 2.
There will be an operation process described in detail assuming that there are the panel capacitor Cp charged with a voltage of 0V and the source capacitor Cs charged with a voltage of Vs/2 before a period T1 of time.
During the period T1 of time, the first switch S1 is turned on, so that there is a current path formed linking the source capacitor Cs, the first switch S1, the inductor L and the panel capacitor Cp. If the current path is formed, the voltage of Vs/2 charged in the source capacitor Cs is applied to the panel capacitor Cp. At this moment, because the inductor L and the panel capacitor Cp form a serial resonance circuit, the panel capacitor Cp is charged with the voltage Vs twice as much voltage as the source capacitor Cs.
During a period T2 of time, the second switch S2 is turned on. If the second switch S2 is turned on, the voltage of the reference voltage source Vs is applied to the first electrode Y. The voltage of the reference voltage source Vs applied to the first electrode Y prevents the voltage of the panel capacitor Cp from dropping below the reference voltage source Vs to make the sustaining discharge generated in a normal manner. On the other hand, because the voltage of the panel capacitor Cp rose to Vs during the period T1, the driving power that is applied from the outside for generating the sustaining discharge may be minimized.
During a period T3 of time, the first switch S1 is turned off. At this moment, the first electrode Y sustains the voltage of the reference voltage source Vs during the period T3.
During a period T4 of time, the second switch S2 is turned off and the third switch S3 is turned on at the same time. When the third switch S3 is turned on, there is a current path formed linking the panel capacitor Cp, the inductor L, the third switch S3 and the source capacitor Cs, so that the voltage charged in the panel capacitor Cp is recovered to the source capacitor Cs. At this moment, the source capacitor Cs is charged with the voltage of Vs/2.
During a period T5 of time, the third switch S3 is turned off and the fourth switch S4 is turned on at the same time. When the fourth switch S4 is turned on, there is a current path formed between the panel capacitor Cp and the ground GND, so that the voltage of the panel capacitor Cp drops to 0V.
During a period T6 of time, the state of the period T5 is sustained for a specified period of time. Actually, the AC driving pulse applied to the first electrode Y and the second electrode Z is obtained as the periods T1 to T6 are periodically repeated.
However, because the source capacitor has been installed to have high capacitance in the energy recovery apparatus according to the related art, there is a big space required for it.